GlobalFoundries and SiFive to Design HBM2E Implementation on 12LP/12LP+

GlobalFoundries and SiFive to Design HBM2E Implementation on 12LP/12LP+ 1

GlobalFoundries and SiFive announced on Tuesday that they will be co-developing an implementation of HBM2E memory for GloFo’s 12LP and 12LP+ FinFET process technologies. The IP package will enable SoC designers to quickly integrate HBM2E support into designs for chips that need significant amounts of bandwidth.

The HBM2E implementation by GlobalFoundries and SiFive includes the 2.5D packaging (interposer) designed by GF, with the HBM2E interface developed by SiFive. In addition to HBM2E technology, licensees of SiFive also gain access to the company’s RISC-V portfolio and DesignShare IP ecosystem for GlobalFoundries’ 12LP/12LP+, which will enable SoC developers to build RISC-V-based devices GloFo’s advanced fab technology.

GlobalFoundries and SiFive suggest that the 12LP+ manufacturing process and the HBM2E implementation will be primarily used for artificial intelligence training and inference applications for edge computing, with vendors looking to optimize for TOPS-per-milliwatt performance.

For GlobalFoundries, it is important to land customers who need specialized process technologies and may not be ready for leading-edge processes from TSMC and Samsung Foundry for cost or other reasons. As for SiFive’s involvement, this is a bit trickier – RISC-V itself isn’t likely to be used for the core logic in deep learning accelerators, but it is a solid architecture to use for the embedded CPU cores needed to control the dataflows within an accelerator.

SiFive’s HBM2E interface and custom IP for GlobalFoundries’ 12LP and 12LP+ technology are being developed at GF’s Fab 8 in Malta, New York. The two companies expect that they’ll be able to wrap up their work in the first half of 2020, at which point the IP will become available for licensing.

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Source: GlobalFoundries

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